OCR A Level Computer Science

1.1.1 (b) The Fetch–Decode–Execute Cycle

The Fetch–Decode–Execute (FDE) cycle is the repeated process the CPU follows to retrieve, interpret, and carry out instructions from memory.

What is the Fetch–Decode–Execute Cycle?

The Fetch–Decode–Execute cycle is the continuous process that the CPU goes through repeatedly to process instructions.

There are three stages:

Fetching an instruction from memory
Decoding the instruction
Executing the instruction

Stage 1: Fetch

The Program Counter (PC) holds the address of the next instruction.
The value in the PC is copied to the Memory Address Register (MAR).
The PC is incremented by 1 so it points to the next instruction.
The address in the MAR is sent across the address bus.
The Control Unit (CU) sends a read signal on the control bus.
RAM sends the instruction on the data bus to the Memory Data Register (MDR).
The instruction is copied from the MDR to the Current Instruction Register (CIR).

Stage 2: Decode

The instruction in the CIR is split into the opcode and operand.
The Control Unit (CU) decodes the instruction.
This allows the CPU to understand what action must be carried out.

Stage 3: Execute

The processor carries out the instruction identified in the decode stage. Which registers are used depends on the instruction being executed.

Instruction	What happens during execute
INP	A value is input and stored in the ACC.
OUT	The value currently in the ACC is output.
LDA	Data is loaded from RAM to the MDR and then used by the CPU.
STA	The value in the ACC is copied to the MDR and stored in memory at the address in the MAR.
ADD / SUB	Values are passed to the ALU, the operation is carried out, and the result is stored in the ACC.
BRA / BRZ / BRP	The comparison takes place in the ALU and the PC may be updated with a new address.

Registers Used in the FDE Cycle

Register	Purpose
PC	Holds the address of the next instruction to be fetched.
MAR	Holds the memory address being accessed.
MDR	Holds the data being transferred to or from memory.
CIR	Holds the current instruction being decoded and executed.
ACC	Stores data and the results of calculations.

Effects on Registers

In exam questions, you must know both which registers are used and the values they contain.

Examiner tip: naming the register alone is not enough. You usually need the value in the register as well.

Worked Example (LMC)

A program written in the Little Man Computer instruction set is shown below.

      INP
      STA num
loop  LDA total
      ADD num
      STA total
      LDA count
      ADD one
      STA count
      SUB num
      BRZ end
      BRA loop
end   LDA total
      OUT
      HLT
one   DAT 1
num   DAT 0
count DAT 0
total DAT 0

Worked Example Question

Explain which registers are used and their values when the line STA count is executed and the accumulator is holding the value 9. The label count refers to memory location 16.

How to answer it

The instruction is STA count, so a value is being stored in memory.
The ACC already holds the value 9.
The value 9 is copied from the ACC to the MDR.
The address 16 is placed in the MAR.
The value is then written to memory location 16.

Full Mark Answer

The contents of the accumulator, which is 9, will be copied to the MDR. Then 9 is copied to memory location 16.

Other Acceptable Point

The value 16 is copied to the MAR.

Why values matter

If your answer did not include the values 9 and16, you would not get the marks even if you named the correct registers. The question asks for the registers used and their values.

Interrupts

The CPU checks for interrupts at the start or end of each FDE cycle. If an interrupt occurs, the contents of registers are pushed onto a stack so they can be restored after the Interrupt Service Routine (ISR) finishes.

Pipelining

Contemporary processors use pipelining so the fetch, decode, and execute stages can overlap. This means one instruction can be fetched while another is being decoded and another is being executed.

This increases the throughput of instructions and improves CPU performance.

Examiner Tips and Tricks

You need to know how registers are used in assembly language questions.
Be specific about the contents of each register.
When counting memory locations in LMC, remember the first line is memory location 0.
Data can only be sent to memory from the MDR.
Addresses being accessed are stored in the MAR.

Quick Summary

The CPU repeatedly performs fetch, decode, and execute.
PC, MAR, MDR, CIR, and ACC all have important roles.
The ALU is used for arithmetic, logic, and branch comparisons.
Interrupts can pause the cycle and run an ISR.
Pipelining allows multiple instructions to be at different stages at the same time.