Overview of the CPU
The Central Processing Unit (CPU) is responsible for executing instructions, processing data, and controlling the operation of the computer.
The CPU follows the Von Neumann architecture, meaning instructions and data share the same memory and a single set of buses is used.
Arithmetic and Logic Unit (ALU)
The ALU performs all arithmetic operations → addition, subtraction, multiplication, division.
The ALU performs all logical operations → AND, OR, NOT, XOR, comparisons.
Results are stored in the Accumulator (ACC).
Internal Components of the ALU
- Arithmetic circuit → performs calculations
- Logic circuit → performs logical operations
- Registers → temporary storage
- Zero flag → result = 0
- Overflow flag → result too large
Control Unit (CU)
The Control Unit manages the CPU and coordinates all operations.
Key Functions
- Controls the Fetch-Decode-Execute (FDE) cycle
- Decodes instructions
- Sends control signals (e.g. read, write)
- Manages the flow of data between components
Registers
Registers are very small, very fast memory locations inside the CPU.
They are used for temporary storage during processing.
They are faster than RAM and secondary storage.
Each register has a specific purpose.
Program Counter (PC)
Holds the address of the next instruction.
After fetching, it is incremented.
Accumulator (ACC)
Stores results of ALU operations.
Stores intermediate data.
Stores recently fetched data.
Memory Address Register (MAR)
Stores the address of data/instruction.
Sent via the address bus.
Memory Data Register (MDR)
Also called MBR.
Stores the actual data or instruction.
Transfers data between CPU and memory.
Current Instruction Register (CIR)
Holds the current instruction.
Instruction is copied from MDR.
Instruction is split into opcode + operand.
Instruction is sent to CU for decoding.
System Buses
Buses are communication pathways that connect CPU, memory, and input/output devices.
Address Bus
Carries memory addresses.
Direction: Unidirectional (CPU → memory).
Data Bus
Carries data and instructions.
Direction: Bidirectional.
Control Bus
Carries control signals.
Examples: Read, Write, Interrupt signals.
Direction: Bidirectional.
Internal Buses
Exist inside the CPU.
Connect registers, ALU, and cache.
Link to Assembly Language Programs
1. Direct Register Manipulation
Assembly instructions work directly with registers.
- LDA (Load Accumulator) → Loads data from memory into ACC
- STA (Store Accumulator) → Stores data from ACC into memory
This directly uses MAR (address), MDR (data), and ACC (storage).
2. Controlling the Program Counter
Branch instructions modify program flow.
- BRA (Branch Always)
- BRZ (Branch if Zero)
These instructions change the value in the PC and control which instruction is executed next.
3. Interaction with Buses
Assembly instructions trigger:
- Address bus → send memory address (via MAR)
- Data bus → transfer data (via MDR)
- Control bus → send read/write signals
4. Efficiency of Assembly
Provides low-level control of hardware.
More efficient than high-level languages.
Used in embedded systems and performance-critical applications.
5. Translation
Assembly is translated into machine code by an assembler.
CPU executes binary instructions only.
Bringing It All Together (Big Picture)
- PC holds next instruction address
- Address sent to MAR
- Instruction fetched into MDR
- Copied to CIR
- CU decodes instruction
- ALU executes operation
- Result stored in ACC
- Data transferred via buses
Exam Focus (Common Errors)
- MAR = address
- MDR = data
- Address bus = one way
- Data bus = two way
- CU = control + decoding
- ALU = calculations
Exam Sentence Starters
- “The Control Unit coordinates the Fetch-Decode-Execute cycle by…”
- “The MAR stores the memory address which is sent via the address bus…”
- “The MDR holds the data being transferred between memory and the CPU…”
- “Assembly language allows direct manipulation of registers such as the ACC…”